One of the limiting factors of modern computer and semiconductor technology is power consumption. In particular, with the ability to produce smaller and smaller structures and devices, increased leakage currents occur even if devices are in idle states. One way of limiting an overall power consumption of a computing system and its total leakage is providing two processor cores which are designed to run at different speeds or frequencies and which by design have different leakages. Depending on the tasks performed and the processing power needed, there may be switched between the fast core and the slower core. The faster processor core is usually provided with a State Retention Power Gate (SRPG) function, enabling it to store state information when it is powered off. Such a SRPG function is usually provided by an arrangement of flip-flops to ensure fast storage and access to the state information.